Baffle plate for manufacturing semiconductor



FIG. 1 is a front view of a baffle plate of the present invention.

FIG. 2 is a rear view of the baffle plate of FIG. 1.

FIG. 3 is a top plan view of the baffle plate of FIG. 1.

FIG. 4 is a bottom view of the baffle plate of FIG. 1.

FIG. 5 is a right side view of the baffle plate of FIG. 1.

FIG. 6 is a left view of the baffle plate of FIG. 1.

FIG. 7 is a perspective view of the baffle plate of FIG. 1; and,

FIG. 8 is a view of the baffle plate of FIG. 1 in use, wherein, for example, in a plasma processing device, gas entering a chamber is ionized, and a wafer is treated by an etching process with ions, and gas is exhausted from the chamber.

The features shown in broken lines depict environmental subject matter only and form no part of the claimed design. 

CLAIM The ornamental design for a baffle plate for manufacturing semiconductor, as shown and described. 